Title :
A 0.18 μm CMOS Ultra-Wideband Low-Noise Amplifier with High IIP3
Author :
Peltonen, Teemu ; Shen, Meigen ; Koivisto, Tero ; Duo, Xinzhong ; Tjukanoff, Esa ; Zheng, Li-Rong ; Tenhunen, Hannu
Author_Institution :
Dept. of Inf. Technol., Turku Univ.
Abstract :
In this paper an ultra-wideband low-noise amplifier (LNA) for the frequency range of 3.1 - 9.4 GHz using 0.18 mum CMOS RF process is introduced. Single-ended single stage LNA structure utilises an input LC-ladder, cascode transistor configuration and LRC-feedback to realise an ultra broad bandwidth response. In operating frequency range noise figure (NF) of 3.1 dB and gain of 10.6 dB were achieved along with high linearity (IIP3) even up to 10.9 dBm at 3.1 GHz. With the bias network, the LNA had a total power consumption of 31 mW from 1.8 V supply
Keywords :
CMOS integrated circuits; ladder networks; low noise amplifiers; microwave amplifiers; ultra wideband technology; wideband amplifiers; 0.18 micron; 1.8 V; 10.6 dB; 3.1 dB; 3.1 to 9.4 GHz; 31 mW; CMOS RF process; LRC-feedback; cascode transistor configuration; high IIP3; input LC-ladder; low-noise amplifier; noise figure; power consumption; single stage LNA structure; single-ended LNA structure; ultra broad bandwidth response; ultra-wideband amplifier; Bandwidth; CMOS process; Energy consumption; Gain; Linearity; Low-noise amplifiers; Noise figure; Noise measurement; Radio frequency; Ultra wideband technology;
Conference_Titel :
High Density Microsystem Design and Packaging and Component Failure Analysis, 2005 Conference on
Conference_Location :
Shanghai
Print_ISBN :
0-7803-9292-2
Electronic_ISBN :
0-7803-9293-0
DOI :
10.1109/HDP.2005.251445
