DocumentCode :
2735495
Title :
Low depth carry look ahead circuits using rail-to-rail capacitive threshold logic
Author :
Garimella, Sri Raga Sudha ; Garimella, Annajirao ; Kalyani-Garimella, Lalitha Mohana ; Ramirez-Angulo, Jaime
Author_Institution :
Intel Corp., Hillsboro, OR
fYear :
2008
fDate :
10-13 Aug. 2008
Firstpage :
574
Lastpage :
577
Abstract :
Compact low depth carry look-ahead circuits using rail-to-rail capacitive threshold logic are proposed. Experimental results of a fabricated test chip from MOSIS in 0.5 mum CMOS technology are presented that validate the proposed circuits operating with a single supply as low as 1.8 V.
Keywords :
CMOS logic circuits; adders; carry logic; threshold logic; CMOS technology; low depth carry look ahead circuits; rail-to-rail capacitive threshold logic; size 0.5 mum; voltage 1.8 V; Adders; CMOS logic circuits; CMOS technology; Capacitors; Circuit testing; Logic circuits; Logic gates; MOSFETs; Signal generators; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2008. MWSCAS 2008. 51st Midwest Symposium on
Conference_Location :
Knoxville, TN
ISSN :
1548-3746
Print_ISBN :
978-1-4244-2166-4
Electronic_ISBN :
1548-3746
Type :
conf
DOI :
10.1109/MWSCAS.2008.4616864
Filename :
4616864
Link To Document :
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