A Fast Group-based Variable-length Decoder and ASIC Implementation

A high performance VLC decoder for DCT coefficients of MPEG-2 applications is proposed in this paper. Using parallel technique, a group-based approach is developed to decode a codeword within a single clock cycle. The codeword table is grouped according to the codeword prefix, so the current bitstream only needs to match with all the group prefixes instead of all possible codewords in the codeword tables. A look-up table (LUT) is optimized to save hardware resource and the searching time. The relativity within a group or different groups is used to remove the redundant bits and increase the efficiency of hardware resource. The decoding method is verified on FPGA and synthesized by 0.6 mum CMOS with 2237 cells, and the throughput is about 100Msymbols/s at 100 MHz clock rate