Real time implementation of baseline JPEG decoder using floating point DSP TMS320C31

Author

Yusof, Zulkefli Muhammed ; Mohamad, Zainab ; Aspar, Z. ; Suleiman, I. ; Saad, Mohamad Hanif Md. ; Salleh, S.H.S.

Author_Institution

Fac. of Electr. Eng., Univ. Technol. Malaysia, Johor

Volume

3

fYear

2000

fDate

2000

Firstpage

383

Abstract

This paper describes the implementation of the baseline JPEG decoder on the TI 32 bit floating point DSP processor TMS320C31 (Texas Instruments). The decoder can be used to decode compressed gray scale image and video signal. But with slight modifications to the assembly code, it can also handle color images. Fast two dimensional inverse discrete cosine transform (2D-DCT) and parallel Huffman decoding schemes have been employed to allow fast decoding of the encoded image or video signal. The DSP-based JPEG decoder is capable of performing real time decoding of compressed video signal (with 160×120 pixels resolution) with frame rate of more than 10 frames per second

Keywords

Huffman codes; code standards; decoding; digital signal processing chips; discrete cosine transforms; floating point arithmetic; image coding; image colour analysis; image resolution; telecommunication standards; transform coding; video coding; 120 pixel; 160 pixel; 19200 pixel; 2D inverse discrete cosine transform; 32 bit; Texas Instruments TMS320C31; assembly code; baseline JPEG decoder; color images; compressed gray scale image; compressed video signal; fast 2D-DCT; floating point DSP chip; parallel Huffman decoding; pixels resolution; real time implementation; Assembly; Color; Decoding; Digital signal processing; Discrete cosine transforms; Image coding; Instruments; Signal resolution; Transform coding; Video compression;

fLanguage

English

Publisher

ieee

Conference_Titel

TENCON 2000. Proceedings

Conference_Location

Kuala Lumpur

Print_ISBN

0-7803-6355-8

Type

conf

DOI

10.1109/TENCON.2000.892294

Filename

892294