Optimized scheme for power-of-two coefficient approximation for low power decimation filters in sigma delta ADCs

A novel method for approximating filter coefficients to signed-power-of-two terms is proposed yielding a significant reduction in complexity and power consumption. A Matlab toolbox named MSD-Toolbox (multi-stage decimation) was developed to design and optimize multi-stage decimation filters. The proposed design methodology was used to design an example decimation filter, which was synthesized in 0.13 mum CMOS technology. The power consumption of the synthesized structure was analyzed. A reduction in power consumption of about 20% has been achieved for a 3-bit, second order lowpass sigma delta ADC decimation filter stage when compared with the conventional structure. For the well known quadratic polynomial objective function of FIR filters a novel subject constraint and limited signed-power-of-two space has been introduced.