A Fully Integrated CMOS RF Power Amplifier with Parallel Power Combining and Power Control

This paper presents a fully integrated RF power amplifier (PA) operating at 2.45 GHz and integrated in a 0.13mum CMOS technology. To achieve an output power of 23dBm, the architecture consists of four amplifiers whose outputs are combined by an on-chip power combining and matching network. The power added efficiency is 28% at 2.45 GHz and -6dBm input power. At lower power levels, the efficiency is increased by using only one power amplifier. This technique reduces the power consumption of the driver stages. The presented fully integrated solution reduces the required board area and increases the overall transmitter efficiency