DocumentCode :
2736483
Title :
A Fast Settling Low Dropout Linear Regulator with Single Miller Compensation Capacitor
Author :
Lu, Sao-Hung ; Huang, Wei-Jen ; Liu, Shen-Iuan
Author_Institution :
Graduate Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei
fYear :
2005
fDate :
1-3 Nov. 2005
Firstpage :
153
Lastpage :
156
Abstract :
A 1.8-V, 150-mA fast settling low dropout linear regulator (LDO) with single Miller compensation capacitor is presented. By utilizing the digital-controlled dynamic bias circuit to track the output current, the proposed LDO provides fast settling time for the output capacitors with low and high equivalent series resistance (ESR). The proposed LDO has been fabricated in a 0.35-um 2P4M CMOS technology, and the active chip area is 480 um times675 um. The measurement results show the settling time of 4us can be achieved with 0.5% error for full load-current changes for both multilayer ceramic and electrolytic 1-uF output capacitors. Furthermore, the line and load regulations are 0.127%N and 40ppm/mA, respectively. The dropout voltage is 190mV in 150mA output current. The measured quiescent current is 45uA in 5V supply voltage without output current
Keywords :
CMOS integrated circuits; ceramic capacitors; integrated circuit design; voltage regulators; 0.35 micron; 1 muF; 1.8 V; 150 mA; 190 mV; 4 mus; 45 muA; 480 micron; 5 V; 675 micron; CMOS technology; digital-controlled dynamic bias circuit; electrolytic capacitors; equivalent series resistance; low dropout linear regulator; multilayer ceramic; single Miller compensation capacitor; CMOS technology; Capacitors; Circuits; Electrical resistance measurement; Nonhomogeneous media; Paramagnetic resonance; Regulators; Semiconductor device measurement; Time measurement; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Asian Solid-State Circuits Conference, 2005
Conference_Location :
Hsinchu
Print_ISBN :
0-7803-9162-4
Electronic_ISBN :
0-7803-9163-2
Type :
conf
DOI :
10.1109/ASSCC.2005.251688
Filename :
4017554
Link To Document :
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