DocumentCode
2736926
Title
High efficiency selective emitter enabled through patterned ion implantation
Author
Low, Russell ; Gupta, Atul ; Bateman, Nicholas ; Ramappa, Deepak ; Sullivan, Paul ; Skinner, Wesley ; Mullin, James ; Peters, Stefan ; Weiss-Wallrath, Harold
Author_Institution
Varian Semicond. Equip. Assoc. (VSEA), Gloucester, MA, USA
fYear
2010
fDate
20-25 June 2010
Abstract
Selective emitter cell architectures offer the opportunity of improved cell efficiency over standard cell architectures through improved blue response, reduced saturation current and lower contact resistance. However, few selective emitter cell concepts have been successfully adopted into high volume manufacturing, often due to the associated increase in process complexity and cost. This paper demonstrates that patterned ion implantation provides a roadmap to lower PV module and system $/Wp costs through improved cell efficiency and reduced manufacturing cost. Ion implanted cell efficiency improvements, which can be up to +1% absolute, are a result of not only the selective emitter cell architecture, but also improved emitter quality, oxide passivation and increased light collection area through the elimination of laser edge isolation. Manufacturing cost reductions result from reduced processing steps and improved process uniformity and cell binning.
Keywords
contact resistance; ion implantation; nanopatterning; passivation; blue response; contact resistance; emitter quality; high efficiency selective emitter; laser edge isolation; light collection area; oxide passivation; patterned ion implantation; saturation current; standard cell architectures; Computer architecture; Ion implantation; Manufacturing; Microprocessors; Passivation; Resistance; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Photovoltaic Specialists Conference (PVSC), 2010 35th IEEE
Conference_Location
Honolulu, HI
ISSN
0160-8371
Print_ISBN
978-1-4244-5890-5
Type
conf
DOI
10.1109/PVSC.2010.5614426
Filename
5614426
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