DocumentCode
2737364
Title
Analyzing N-Curve Metrics for Sub-Threshold 65nm CMOS SRAM
Author
Samson, Mamatha ; Srinivas, M.B.
Author_Institution
Center for VLSI & Embedded Syst. Technol., Int. Inst. of Inf. Technol., Hyderabad
fYear
2008
fDate
18-21 Aug. 2008
Firstpage
25
Lastpage
28
Abstract
This paper examines the usefulness of N-curve metrics for a 65 nm SRAM cell operating in sub-threshold region. Various N-curve metrics are evaluated with changing power supply voltage, temperature, cell ratios, pull up ratios and oxide thickness. N-curve metrics are also evaluated considering the effect of intra die and inter die random threshold voltage variations. Results indicate that N-curve method provides better metrics in terms of SINM and WTI to assess the stability of SRAM operating in sub-threshold region and enables complete functional analysis.
Keywords
CMOS memory circuits; SRAM chips; N-curve metrics; cell ratios; interdie threshold voltage; oxide thickness; size 65 nm; subthreshold CMOS SRAM; supply voltage; Current measurement; Functional analysis; Information analysis; Inverters; Noise measurement; Random access memory; Stability analysis; Temperature; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanotechnology, 2008. NANO '08. 8th IEEE Conference on
Conference_Location
Arlington, TX
Print_ISBN
978-1-4244-2103-9
Electronic_ISBN
978-1-4244-2104-6
Type
conf
DOI
10.1109/NANO.2008.16
Filename
4616998
Link To Document