The influence of lattice temperature on SOI MOSFET´s output characteristics

Silicon-on-insulator (SOI) MOSFET´s have emerged as a technology that can compete with conventional bulk-silicon technology for high performance applications. Total dielectric isolation between devices eliminates many of the latch-up and leakage paths associated with bulk-Si technology. However, the thin insulating layer thermally and electrically isolates the active silicon layer from the bulk. This results in both a floating potential within the device and self-heating, which leads to non-linear behaviour of the MOSFET. These effects modify the output behaviour of the SOI MOSFET. The effects of the floating potential and self-heating on the non-isothermal output characteristics of SOI MOSFETs are studied using the two dimensional simulator MEDICI and the results are presented here