• DocumentCode
    2737693
  • Title

    4 Gbps On-Chip Interconnection using Differential Transmission Line

  • Author

    Ito, Hiroyuki ; Sugita, Hideyuki ; Okada, Kenichi ; Masu, Kazuya

  • Author_Institution
    Precision & Intelligence Lab., Tokyo Inst. of Technol., Yokohama
  • fYear
    2005
  • fDate
    1-3 Nov. 2005
  • Firstpage
    417
  • Lastpage
    420
  • Abstract
    This paper demonstrates the differential transmission line interconnect for high-speed global interconnect IP. The interconnect is fabricated using a 180 nm CMOS technology. 4 Gbps signal transmission can be achieved in measurement results. The on-chip transmission line performs faster signal transmission than common RC interconnects
  • Keywords
    CMOS integrated circuits; integrated circuit interconnections; transmission lines; 180 nm; 4 Gbit/s; CMOS technology; differential transmission line interconnect; high-speed global interconnect IP; on-chip interconnection; on-chip transmission line; signal transmission; Transmission lines;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Asian Solid-State Circuits Conference, 2005
  • Conference_Location
    Hsinchu
  • Print_ISBN
    0-7803-9162-4
  • Electronic_ISBN
    0-7803-9163-2
  • Type

    conf

  • DOI
    10.1109/ASSCC.2005.251754
  • Filename
    4017620
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2737693