A 35MS/s and 2V/2.5V Current-mode Sample-and-Hold Circuit with an Input Current Linearization Technique

This paper introduces a high-speed and high-accuracy current-mode sample-and-hold (S/H) circuit that adopts the new linearization technique to the resistor-based voltage-to-current converted input current. The pseudo differential configuration is used to form the whole S/H circuit in order to cancel the clock feedthrough from the S/H switch. The circuit is designed and fabricated by using the 0.35 mum CMOS process. The power supplies are 2 V for the analog part and 2.5 V for the logic part. The 1.34 MHz input signal with a -5 dB of full-scale current was applied to the S/H IC, and the measured distortion was -68 dB. The S/H IC operated with a signal-to-noise ratio (S/N) of 57 dB up to 10 MHz input signal when the clock frequency was 20 MHz, and with a S/N of 50 dB at 17.5 MHz input signal when the clock frequency was 35 MHz