DocumentCode
273832
Title
Type-handling in bit-true silicon compilation for DSP
Author
Pauwels, M. ; Catthoor, F. ; Lanneer, D. ; De Man, H.
Author_Institution
IMEC Leuven, Belgium
fYear
1989
fDate
5-8 Sep 1989
Firstpage
166
Lastpage
170
Abstract
The behavioural description of a DSP algorithm consists of a signal flow graph, i.e. a list of operations on variables defined by their numerical types. The authors show the impact of numerical types on the automated architectural synthesis of application specific ICs for DSP and how type information can be used to come up with an efficient ASIC architecture. The term bit-true silicon compilation is defined and exemplified with the new CATHEDRAL-2nd synthesis system. In particular the alignment and multiplexer-input minimization tasks, which are strongly related with type-handling, is discussed in detail and exemplified
Keywords
circuit layout CAD; computerised signal processing; digital signal processing chips; logic CAD; CAD; CATHEDRAL-2nd synthesis system; DSP algorithm; alignment; application specific ICs; automated architectural synthesis; behavioural description; bit-true silicon compilation; efficient ASIC architecture; layout design; multiplexer-input minimization; numerical types; signal flow graph; type information; type-handling;
fLanguage
English
Publisher
iet
Conference_Titel
Circuit Theory and Design, 1989., European Conference on
Conference_Location
Brighton
Type
conf
Filename
51600
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