DocumentCode :
2738975
Title :
FPGA Based Reconfigurable Platform for Complex Image Processing
Author :
Birla, Manish Kumar
Author_Institution :
Siemens Corporate Technol.
fYear :
2006
fDate :
7-10 May 2006
Firstpage :
204
Lastpage :
209
Abstract :
Field programmable gate arrays (FPGAs) are in use to build high performance DSP systems. FPGAs are uniquely suited to repetitive DSP tasks, such as multiply and accumulate (MAC) operations in parallel. As a result FPGAs can vastly outperform DSP chips, which perform operations in an essentially sequential fashion. The interfaces between FPGA and image sensor have been very slow, which inhibits possibility of exploiting parallel processing in the FPGA This paper discusses method to build an image-processing platform using FPGA. This involves interfacing of FPGA to CMOS image sensor and VGA monitor. We discuss techniques that helped attending speed of 50 FPS (Frames per Second) for an interface of CMOS image sensor to FPGA from earlier reported speed of 3 FPS. A benchmarking application has been executed on FPGA and DSP based system and comparative real time performance data is reported
Keywords :
CMOS integrated circuits; field programmable gate arrays; image processing; image sensors; reconfigurable architectures; CMOS image sensor; FPGA; VGA monitor; complex image processing; reconfigurable platform; CMOS image sensors; Digital cameras; Digital signal processing; Digital signal processing chips; Field programmable gate arrays; Image processing; Image sensors; Monitoring; Parallel processing; Sensor arrays; CMOS Image Sensor; Field programmable gate arrays (FPGA); Image Processing; Parallel Processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electro/information Technology, 2006 IEEE International Conference on
Conference_Location :
East Lansing, MI
Print_ISBN :
0-7803-9592-1
Electronic_ISBN :
0-7803-9593-X
Type :
conf
DOI :
10.1109/EIT.2006.252111
Filename :
4017689
Link To Document :
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