DocumentCode :
2739016
Title :
Next Generation Electroplating Process for HDI Microvia Filling and Through Hole Plating
Author :
Lefebvre, Mark ; Najjar, Elie ; Gomez, Luis ; Barstad, Leon
Author_Institution :
Rohm & Haas Electron. Mater., LLC, Marlborough, MA
fYear :
2008
fDate :
22-24 Oct. 2008
Firstpage :
102
Lastpage :
105
Abstract :
As higher and higher pin-count semiconductor packages are deployed in telecommunications and data processing applications, Printed Circuit Board (PCB) substrates must evolve to allow increased routing densities. To be capable of meeting these routing density and complexity needs, higher layer counts must be combined with filled microvias. High Density Interconnect (HDI) product of this type places significant new demands on the metallization processes, in particular, copper electroplating. To meet these needs, seemingly incompatible objectives must be met. Thinner and more uniform surface copper deposits have to be produced, increasingly difficult microvia geometries must be filled, through-hole throwing power delivered, while maintaining plating rates capable of delivering production throughputs. These demands often exceed the capability of current commercial copper electroplating processes. This paper describes a new pattern-plate, Direct Current (DC) copper electroplating process designed for HDI and packaging substrate applications. Microvia filling performance, plated through hole throwing power, surface distribution / trace profile and product reliability data, as a function of a variety of processing variables is discussed.
Keywords :
copper; electroplating; integrated circuit interconnections; integrated circuit metallisation; integrated circuit packaging; Cu; copper; electroplating; high density interconnect; hole throwing power; metallization; microvia filling; packaging substrate; product reliability; surface distribution; through hole plating; trace profile; Copper; Data processing; Filling; Geometry; Integrated circuit interconnections; Metallization; Printed circuits; Routing; Semiconductor device packaging; Substrates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microsystems, Packaging, Assembly & Circuits Technology Conference, 2008. IMPACT 2008. 3rd International
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-3623-1
Electronic_ISBN :
978-1-4244-3624-8
Type :
conf
DOI :
10.1109/IMPACT.2008.4783818
Filename :
4783818
Link To Document :
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