Converting integer to floating point number

Author

Jing, He ; Yun, Li ; Yue-qiu, Han

Author_Institution

Inf. Eng. Sch., Beijing Broadcasting Inst., China

Volume

2

fYear

2003

fDate

14-17 Dec. 2003

Firstpage

1632

Abstract

Conversion of integer to floating-point number is a frequent operation in high performance DSP processor, and direct conversion is time consuming. An improved method of converting integer to floating point number is presented in this article, in which leading zero is preserved until rounding and complementation are preformed, and normalization is done after rounding, rounding and complementation are combined, so that hardware cost is reduced and complexity of conversion is decreased. The method is used in the design of a DSP processor, and the design is synthesized, verified and implemented with FPGA.

Keywords

computational complexity; digital signal processing chips; field programmable gate arrays; floating point arithmetic; DSP; FPGA; complementation; digital signal processor; field programmable gate array; floating point number; integer number; normalization; number conversion; rounding operation; Adders; Broadcast technology; Broadcasting; Circuits; Costs; Digital signal processing; Field programmable gate arrays; Hardware; Process design;

fLanguage

English

Publisher

ieee

Conference_Titel

Neural Networks and Signal Processing, 2003. Proceedings of the 2003 International Conference on

Conference_Location

Nanjing

Print_ISBN

0-7803-7702-8

Type

conf

DOI

10.1109/ICNNSP.2003.1281194

Filename

1281194