A Parallel Decoder Design for Low Latency Turbo Decoding

To reduce the iterative decoding time in turbo coding, a new parallel decoding algorithm for turbo decoders is proposed. Different than the previous approaches of using multiple SISO decoders to process sub-block MAP decoding in parallel, the new parallel turbo decoder immediately passes the extrinsic information of each message bit which is generated by one SISO decoder to the other SISO decoders bit by bit. Thus, the component decoders corresponding to different received sequence perform in parallel and the interleaver delay is eliminated. Simulation results show that with this parallel scheme, decoding time is halved while the performance in terms of BER is comparable, and in some cases superior, to the general turbo decoder.