Ternary CMOS sequential circuits

Threshold comparison, transmission, and union operations are discussed and used as the basis of a logic design procedure for CMOS ternary circuits. Some basic CMOS ternary circuits are used to design CMOS ternary flip-flops (tri-flops) such as the ternary latch and various master-slave tri-flops. These tri-flops have two additional binary inverse outputs with a fixed threshold. A modulo-9 up counter is presented as an example of sequential circuit design using these tri-flops.<>