DocumentCode
2739788
Title
Photoresist Removal Requirements for Advanced Wafer Level Packaging Technology
Author
Yamamoto, Yasuhisa
Author_Institution
DuPont Electron. Center, DuPont Electron. Technol., Kawasaki, Japan
fYear
2008
fDate
22-24 Oct. 2008
Firstpage
243
Lastpage
245
Abstract
It has been several years since wafer level packaging (WLP) technology has emerged, enabling the packaging industry to successfully fabricate smaller, more reliable modules. The use of this technology is expected to continue to grow in the future. One current WLP trend is to replace high lead solder bumps with lead-free solder bumps. Two of the more promising lead-free bumps are Cu-pillars and bumps. The use of the Cu-pillar/bump approach continues to increase as fabricators drive to increase yields, create more I/O pins per wafer thus resulting in finer bump pitch. The use of liquid photoresist (PR) and/or dry film photoresist (DFR) has become the standard for fine bump pitch formation. The major challenges in using these resists are 1) the effective removal of the resist without residue or redeposit; and 2) the compatibility of the removal chemistry with under bump materials (UBM). This paper will discuss WLP market trends, the technical requirements associated with PR/DFR removal, and conclude with some experimental results of advanced PR/DFR removal.
Keywords
photoresists; soldering; wafer level packaging; dry film photoresist; high lead solder bumps; lead-free solder bumps; liquid photoresist; photoresist removal requirements; wafer level packaging technology; CMOS technology; Consumer electronics; Costs; Environmentally friendly manufacturing techniques; Lead; Packaging; Pins; Polyimides; Resists; Wafer scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Microsystems, Packaging, Assembly & Circuits Technology Conference, 2008. IMPACT 2008. 3rd International
Conference_Location
Taipei
Print_ISBN
978-1-4244-3623-1
Electronic_ISBN
978-1-4244-3624-8
Type
conf
DOI
10.1109/IMPACT.2008.4783855
Filename
4783855
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