Title :
Hybrid Sample Rate Converter with 110dB SNR and 1/10 Less Logic Gates
Author :
Inoue, Manabu ; Kobayashi, Fuminori ; Watanabe, Minoru
Author_Institution :
Kyushu Inst. of Technol. Iizuka, Fukuoka
Abstract :
An SRC, sampling rate converter, consisting of conventional filter-type SRC and time-domain SRC using Fourier interpolation algorithm is proposed. Filter portion realizes over-sampling, and its output is interpolated by the Fourier portion. The SRC achieves noise level of as low as -110dB for all frequencies, and its gate count is about 1000000 FPGA logic cells
Keywords :
Fourier analysis; convertors; field programmable gate arrays; interpolation; logic gates; time-varying networks; 110 dB; FPGA; Fourier interpolation; SNR; hybrid sample rate converter; logic gates; time domain; Circuits; Discrete Fourier transforms; Finite impulse response filter; Fourier series; Frequency; Interpolation; Logic gates; Noise level; Sampling methods; Time domain analysis;
Conference_Titel :
Electro/information Technology, 2006 IEEE International Conference on
Conference_Location :
East Lansing, MI
Print_ISBN :
0-7803-9592-1
Electronic_ISBN :
0-7803-9593-X
DOI :
10.1109/EIT.2006.252121
