FPGA Implementation of Tiger Hash Function

New hash function algorithms have a potential application compared to the conventional MD family hash functions. The architecture and FPGA implementation of a secure hash function Tiger is introduced in this paper. The design was coded using VHDL and for the hardware implementation a Xilinx FPGA device was used. While no other previous Tiger implementations exist, the comparisons are conducted with previous hash functions especially Whirlpool function. The comparisons show that the proposed Tiger function could be used in the application where area is a design constraint, and where a different hash function from MD family of hash function such as Tiger, Whirlpool, is needed for the design