DocumentCode
2740054
Title
A low cost jitter separation and characterization method
Author
Li Xu ; Yan Duan ; Degang Chen
Author_Institution
Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
fYear
2015
fDate
27-29 April 2015
Firstpage
1
Lastpage
5
Abstract
Clock jitter is a crucial factor in high speed and high performance application. Traditional jitter measurement method relies on precise and expensive instrumentations. This paper proposes a low cost jitter measurement and separation method. Instead of using traditional time internal analysis equipment, a simple Analog-to-Digital Converter (ADC) is used as the jitter measurement device. The clock under test is applied as the sampling clock of an ADC while the ADC is sampling a full scale sine wave. The ADC output contains the information of the clock jitter. The algorithm will separately detect the effects of Periodic Jitter, Dual-Dirac Jitter and Random Jitter, and accurately compute the rms value of each jitter component. This method offers great potential for wide use in low cost applications and especially in on-chip or on-board jitter measurement applications. Simulation results demonstrate the functionality, accuracy and robustness of the proposed low-cost jitter measurement method.
Keywords
analogue-digital conversion; clocks; timing jitter; ADC; analog-to-digital converter; clock jitter; dual-dirac jitter; low cost jitter measurement; low cost jitter separation; on-board jitter measurement; on-chip jitter measurement; periodic jitter; random jitter; sampling clock; time internal analysis equipment; Clocks; Estimation; Jitter; Mathematical model; Noise; System-on-chip; Testing; Dual-Dirac jitter; Random jitter; jitter characterization; jitter separation; low-cost jitter testing;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium (VTS), 2015 IEEE 33rd
Conference_Location
Napa, CA
Type
conf
DOI
10.1109/VTS.2015.7116248
Filename
7116248
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