DocumentCode :
2740479
Title :
Surface finishing of cleaved SOI films using epi technologies
Author :
Thilderkvist, A. ; Kang, Sien ; Fuerfanger, Martin ; Malik, Igor J.
Author_Institution :
EPI Substrates Div., Appl. Mater. Inc., Santa Clara, CA, USA
fYear :
2000
fDate :
2000
Firstpage :
12
Lastpage :
13
Abstract :
The use of epi technologies in SOI manufacturing is shown to add flexibility and increased wafer quality, e.g. fewer defects and better top Si-layer uniformity, as well as cluster-tool compatibility. The newly developed smoothing process on the Epi Centura replaces touch-polishing after bond and cleave. RMS values down to 0.08 nm have been achieved on wafers with an initial RMS value as high as 8 nm. The high uniformity of this process offers excellent target thickness control, both through removal and addition of material. It also enables compliant substrate technology for 8" SOI wafers, where the top Si-layer has to be thinned below 20 nm
Keywords :
chemical vapour deposition; etching; silicon-on-insulator; surface topography; thickness control; vapour phase epitaxial growth; wafer bonding; 0.08 nm; 20 nm; 8 in; 8 nm; Epi Centura CVD reactor; RMS roughness; SOI manufacturing; SOI wafers; Si-SiO2; bond-and-cleave process; cleaved SOI films; cluster-tool compatibility; compliant substrate technology; epi technologies; material addition; material removal; process uniformity; smoothing process; surface finishing; target thickness control; top Si-layer thinning; top Si-layer uniformity; touch-polishing; wafer defects; wafer quality; Atomic force microscopy; Etching; Neck; Semiconductor films; Silicon; Smoothing methods; Surface finishing; Temperature; Thickness control; Wafer bonding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOI Conference, 2000 IEEE International
Conference_Location :
Wakefield, MA
ISSN :
1078-621X
Print_ISBN :
0-7803-6389-2
Type :
conf
DOI :
10.1109/SOI.2000.892745
Filename :
892745
Link To Document :
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