Title :
Benchmark circuits improve the quality of a standard cell library
Author :
Lin, Rung-Bin ; Chou, Isaac Shuo-Hsiu ; Tsai, Chi-Ming
Author_Institution :
Dept. of Comput. Eng. & Sci., Yuan-Ze Inst. of Technol., Chungli, Taiwan
Abstract :
The experience of designing and employing two benchmark circuits to improve the quality of a standard cell library is reported. It is found that most of the errors can be uncovered by making use of these two benchmark circuits to port the underlying cell library to the target environment. Two releases of a 0.25 μm standard cell library have been tested by these two benchmark circuits to ensure their quality
Keywords :
cellular arrays; logic CAD; 0.25 micron; benchmark circuit; logic design; standard cell library; Availability; Benchmark testing; Circuit synthesis; Circuit testing; Computer errors; Design engineering; Error correction; Foundries; Libraries; Timing;
Conference_Titel :
Design Automation Conference, 1999. Proceedings of the ASP-DAC '99. Asia and South Pacific
Conference_Location :
Wanchai
Print_ISBN :
0-7803-5012-X
DOI :
10.1109/ASPDAC.1999.759988
