Title :
High-speed and low-power real-time programmable video multi-processor for MPEG-2 multimedia chip on 0.6 μm TLM CMOS technology
Author :
Seung-Min Lee ; Chung, Jin-Hong ; Lee, Seung-Min
Author_Institution :
Dept. of Inf. & Commun. Eng., Dongshin Univ., Naju, South Korea
Abstract :
We developed a Video Multi Processor (VMP) for image compression and decompression schemes of MPEG (especially MPEG-2) in this study. The VMP would apply to programmable architecture, various flexibilities to implement real-time image compression algorithm, and other many applications such as DVD-CD ROM authoring tool and videophone/teleconferencing systems. IO architecture of the VMP is designed for the multi-processor functionality in which uses many VMPs according to required arithmetic quantities of the system. Further, the architecture of the VMP system is simplified by processing the necessary peripheral IO system operations within the processor
Keywords :
CMOS digital integrated circuits; digital signal processing chips; high-speed integrated circuits; low-power electronics; multimedia communication; multiprocessing systems; parallel architectures; pipeline processing; real-time systems; reduced instruction set computing; video codecs; video coding; 0.6 micron; DVD-CD ROM authoring tool; MPEG-2 multimedia chip; RISC processor; TLM CMOS technology; high-speed; image compression; image decompression; low-power; programmable architecture; real-time programmable video multi-processor; videophone/teleconferencing systems; Arithmetic; CMOS technology; Codecs; Image coding; Process control; Reduced instruction set computing; Signal processing algorithms; Streaming media; Transform coding; Video compression;
Conference_Titel :
Design Automation Conference, 1999. Proceedings of the ASP-DAC '99. Asia and South Pacific
Conference_Location :
Wanchai
Print_ISBN :
0-7803-5012-X
DOI :
10.1109/ASPDAC.1999.759995
