Title :
Strategies for Closing the ITRS Funding Gap
Author :
Obeng, Yaw S. ; Knight, Stephen ; De Pinillos, Joaquin V Martinez
Author_Institution :
Office of Microelectron. Programs, Nat. Inst. of Stand. & Technol., Gaithersburg, MD
Abstract :
A contribution from the U.S. National Institute of Standards and Technology, not subject to copyright. All views expressed in this paper are those of the authors and of others to whom attribution is given and are not necessarily those of NIST nor of any of the institutions cited therein. Certain commercial equipment, instruments, or materials are identified in this paper to specify experimental or theoretical procedures. Such identification does not imply recommendation by NIST nor the authors, nor does it imply that the equipment or materials are necessarily the best available for the intended purpose.
Keywords :
VLSI; electronics industry; integrated circuit design; integrated circuit economics; monolithic integrated circuits; ITRS funding gap; International Technology Roadmap for Semiconductors; Moore´s Law; US National Institute of Standards and Technology; device dimension scaling; integrated circuits; transistor count; wafer size; CMOS technology; Cost function; Delay; Electronics industry; Instruments; Microelectronics; Moore´s Law; NIST; Research and development; Risk management;
Conference_Titel :
Nanotechnology, 2008. NANO '08. 8th IEEE Conference on
Conference_Location :
Arlington, TX
Print_ISBN :
978-1-4244-2103-9
Electronic_ISBN :
978-1-4244-2104-6
DOI :
10.1109/NANO.2008.244