Title :
A novel compact model of quantum effects in scaled SOI and double-gate MOSFETs
Author :
Ge, Lixin ; Fossum, Jerry C.
Author_Institution :
Florida Univ., Gainesville, FL, USA
Abstract :
Quantum-mechanical (QM) confinement of inversion-layer carriers significantly affects the threshold voltage and gate capacitance of highly scaled MOSFETs. In bulk-Si and partially depleted (PD) SOI (n)MOSFETs, the confinement is in the potential well defined by the gate-oxide barrier (which is virtually infinite) and the silicon conduction (or valence) band (the steep gradient of which defines the high transverse electric field, which controls the effect) (Stern, 1972). In ultra-thin-film fully depleted (FD) SOI and double-gate (DG) MOSFETs, the well is defined by the front- and back-gate oxide barriers, but the quantum effect can be significantly influenced by the electric field in the Si film (Majkusiak et al, 1998). Furthermore, as the film thickness (tSi) is increased, this influence becomes predominant as in the bulk-Si and PD/SOI devices. In this paper, we present a comprehensive compact model for the quantum-confinement effects for arbitrary tSi. The model, verified by numerical simulation results obtained with a self-consistent Schrodinger-Poisson solver (SCHRED; Vasileska et al, 2000), leads to characterizations of the threshold-voltage increase due to the carrier-energy quantization and the gate-capacitance reduction due to the perturbed carrier distribution
Keywords :
MOSFET; Poisson equation; Schrodinger equation; carrier density; carrier mobility; inversion layers; numerical analysis; quantum interference phenomena; semiconductor device models; silicon-on-insulator; PD/SOI devices; SCHRED self-consistent Schrodinger-Poisson solver; Si film electric field; Si-SiO2; back-gate oxide barrier; bulk-Si MOSFETs; carrier-energy quantization; double-gate MOSFETs; front-gate oxide barrier; gate capacitance; gate-capacitance reduction; gate-oxide barrier; inversion-layer carriers; model verification; nMOSFETs; numerical simulation; partially depleted SOI MOSFETs; perturbed carrier distribution; quantum effect; quantum effects model; quantum-confinement effects; quantum-mechanical confinement; scaled MOSFETs; scaled SOI MOSFETs; silicon conduction band; silicon valence band; threshold voltage; threshold-voltage; transverse electric field; ultra-thin-film fully depleted SOI MOSFETs; Carrier confinement; MOSFETs; Numerical models; Numerical simulation; Potential well; Quantization; Quantum capacitance; Semiconductor films; Silicon; Threshold voltage;
Conference_Titel :
SOI Conference, 2000 IEEE International
Conference_Location :
Wakefield, MA
Print_ISBN :
0-7803-6389-2
DOI :
10.1109/SOI.2000.892796