Title :
An on-chip automatic tuning circuit using integration level approximation technique
Author :
Sung-Dae, Lee ; Myung-Jun, Jang ; Won-Hyo, Lee
Author_Institution :
Dept. of Electron. & Commun., Ansan Tech. Coll., South Korea
Abstract :
An on-chip automatic tuning circuit with proposed integration level approximation technique was designed in a 0.65 m 3.3 V CMOS process for tuning of the variation passive component. To verify the tuning efficiency of the proposed circuit, three types of 2nd-order biquad RC active filters were used. The cut-off frequency (fc) error of filter with the proposed tuning circuit can be reduced by a new algorithm that considers the variation of capacitor value in capacitor arrays as well as the variation of normal component. This circuit runs so fast that it can also be applied to real-time calibration. This tuning circuit with 4-bits resolution achieves -1.6%~+1.5% cut-off-frequency error for ±56% RC variation
Keywords :
CMOS analogue integrated circuits; RC circuits; VLSI; biquadratic filters; circuit tuning; integrated circuit design; integrating circuits; sample and hold circuits; 3.3 V; ADC; CMOS process; DAC; VLSI; capacitor value variation; cut-off frequency error; digital control logic; integration level approximation technique; integrator; mixed control circuit; normal component variation; on-chip automatic tuning circuit; programmable arrays; real-time calibration; second-order biquad RC active filters; simulation; tuning efficiency; variation passive component; Active filters; Approximation methods; Circuit optimization; Computer science; Quantization; Signal processing algorithms; Switched capacitor circuits; Switches; Switching converters; Very large scale integration;
Conference_Titel :
Design Automation Conference, 1999. Proceedings of the ASP-DAC '99. Asia and South Pacific
Conference_Location :
Wanchai
Print_ISBN :
0-7803-5012-X
DOI :
10.1109/ASPDAC.1999.760010