Pentium(R) Pro processor design for test and debug

Author

Carbine, Adrian ; Feltham, Derek

Author_Institution

Intel Corp., Hillsboro, OR, USA

fYear

1997

fDate

1-6 Nov 1997

Firstpage

294

Lastpage

303

Abstract

This paper describes the Design for Test (DFT) and silicon debug features of the Pentium(R) Pro processor, and its production test development methodology. The need to quickly ramp a complex, high-performance microprocessor into high-volume manufacturing with low defect rates led the design team to a custom low-area DFT approach, coupled with a manually-written test methodology which targeted several fault models. Results show that this approach was effective in balancing testability needs with other design constraints, while enabling excellent time to market and test quality

Keywords

built-in self test; computer testing; design for testability; integrated circuit testing; microprocessor chips; production testing; CPU performance; Pentium(R) Pro processor design; cooling; custom low-area DFT; defect rates; fault models; high-performance microprocessor; high-volume manufacturing; silicon debug; testability; time to market; Circuit testing; Design for testability; Microprocessors; Portfolios; Process design; Production; Silicon; Time to market; Virtual manufacturing; Workstations;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1997. Proceedings., International

Conference_Location

Washington, DC

ISSN

1089-3539

Print_ISBN

0-7803-4209-7

Type

conf

DOI

10.1109/TEST.1997.639630

Filename

639630