Concepts of Switching in the Time-Triggered Network-on-Chip

This paper presents the concepts of switching in the Time-Triggered Network-on-Chip (TTNoC), which is the communication subsystem of the Time-Triggered System on-Chip (TTSoC) architecture. This includes the design of the switching components that make up the network-on-chip (NoC), as well as the switching algorithm applied in those components. Furthermore, we focus on the implications for the operation of the TTNoC entailed by these design choices, and deal with frequently used scenarios in a NoC, particularly multi-casting. Finally, we present results of a prototype implementation based on FPGA technology.