Title :
Signature analysis for IC diagnosis and failure analysis
Author :
Henderson, Christopher L. ; Soden, Jerry M.
Author_Institution :
Electron. Quality Reliability Center, Sandia Nat. Labs., Albuquerque, NM, USA
Abstract :
A method of signature analysis is presented that is based on ATE data, experiential knowledge of failure modes and mechanisms, or a combination of both. This method can be used on low numbers of failures or even single failures. It uses the Dempster-Shafer theory to calculate failure mechanism confidence. This method can be used for rapid diagnosis of complex IC failures. The model is developed and an example is given based on Sandia´s 0.5 μm CMOS IC technology
Keywords :
Bayes methods; CMOS digital integrated circuits; automatic test equipment; automatic testing; failure analysis; integrated circuit testing; logic testing; 0.5 mum; ATE data; CMOS IC technology; Dempster-Shafer theory; IC diagnosis; Sandia; complex IC failures; failure analysis; failure modes; rapid diagnosis; signature analysis; Bayesian methods; CMOS integrated circuits; CMOS technology; Failure analysis; Integrated circuit modeling; Integrated circuit testing; Laboratories; Mathematical model; Semiconductor device modeling; Statistics;
Conference_Titel :
Test Conference, 1997. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-4209-7
DOI :
10.1109/TEST.1997.639632
