DocumentCode

2742916

Title

A High Speed Clamped-Bit-Line Sensing Scheme For 1T Dynamic RAMs

Author

Blalock, T.N. ; Jaeger, R.C.

Author_Institution

Alabama Microelectronics Science And Technology Center

fYear

1991

fDate

May 30 1991-June 1 1991

Firstpage

61

Lastpage

62

Keywords

Capacitance; Circuit noise; Circuit testing; Clamps; Coupling circuits; Impedance; Power supplies; Random access memory; Read-write memory; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 1991. Digest of Technical Papers. 1991 Symposium on

Conference_Location

Oiso, Japan

Type

conf

DOI

10.1109/VLSIC.1991.760078

Filename

760078