Title :
A High Speed Clamped-Bit-Line Sensing Scheme For 1T Dynamic RAMs
Author :
Blalock, T.N. ; Jaeger, R.C.
Author_Institution :
Alabama Microelectronics Science And Technology Center
fDate :
May 30 1991-June 1 1991
Keywords :
Capacitance; Circuit noise; Circuit testing; Clamps; Coupling circuits; Impedance; Power supplies; Random access memory; Read-write memory; Voltage;
Conference_Titel :
VLSI Circuits, 1991. Digest of Technical Papers. 1991 Symposium on
Conference_Location :
Oiso, Japan
DOI :
10.1109/VLSIC.1991.760078
