DocumentCode
2742933
Title
Partitioning methods for unicast/multicast traffic in 3D NoC architecture
Author
Ebrahimi, Masoumeh ; Daneshtalab, Masoud ; Liljeberg, Pasi ; Tenhunen, Hannu
Author_Institution
Turku Centre for Comput. Sci. (TUCS), Turku, Finland
fYear
2010
fDate
14-16 April 2010
Firstpage
127
Lastpage
132
Abstract
As the scale of integration grows, the interconnection problem becomes one of the major design considerations of Multi Processor System on Chip (MPSoC). In recent years, many researchers have conducted studies on 3D IC designs stacking multiple layers on top of each other. In order to decrease the transmission delay of unicast/multicast messages in a network based multicore system, the network is divided into several partitions. In this paper, we first introduce a novel idea of balanced partitioning that allows the network to be partitioned effectively. Then, we propose a set of partitioning approaches each with a different level of efficiency. In addition, we present an advantageous method based on the idea of balanced partitioning to provide a high degree of parallelism with a considerable reduction of packet delay in unicast/multicast traffic. Simulations are provided to evaluate and compare the performance of proposed methods.
Keywords
integrated circuit design; network-on-chip; telecommunication traffic; 3D IC designs stacking multiple layers; 3D NoC architecture; MPSoC; multiprocessor system on chip; network based multicore system; partitioning methods; unicast-multicast traffic; Computer architecture; Delay; Energy consumption; Multicast communication; Network topology; Network-on-a-chip; Routing protocols; System recovery; Unicast; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2010 IEEE 13th International Symposium on
Conference_Location
Vienna
Print_ISBN
978-1-4244-6612-2
Type
conf
DOI
10.1109/DDECS.2010.5491800
Filename
5491800
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