Title :
Pseudo-random testing of CMOS ternary logic circuits
Author :
Rozon, C. ; Mouftah, H.T.
Author_Institution :
Dept. of Electr. Eng., R. Mil. Coll. of Canada, Kingston, Ont., Canada
Abstract :
Two structures that can be used to test ternary logic VLSI circuits are described and compared: the ternary BILBO (built-in logic block observer) and the ternary CALBO (cellular automaton logic block observer). These structures can be used to generate pseudorandom test patterns and signatures. Fault coverage and aliasing are also obtained and compared when each structure is used to test a four-trit ternary arithmetic logic unit. BILBO and CALBO can be used advantageously to test binary VLSI systems as well.<>
Keywords :
CMOS integrated circuits; VLSI; integrated logic circuits; logic testing; ternary logic; CMOS ternary logic circuits; VLSI circuits; built-in logic block observer; cellular automaton logic block observer; four-trit ternary arithmetic logic unit; pseudorandom testing; signatures; ternary BILBO; ternary CALBO; Automata; Automatic testing; CMOS logic circuits; Circuit faults; Circuit testing; Logic circuits; Logic testing; Multivalued logic; Test pattern generators; Very large scale integration;
Conference_Titel :
Multiple-Valued Logic, 1988., Proceedings of the Eighteenth International Symposium on
Conference_Location :
Palma de Mallorca, Spain
Print_ISBN :
0-8186-0859-5
DOI :
10.1109/ISMVL.1988.5189
