An extended delta compression algorithm and the recovery of failed updating in embedded systems

Author

Terazono, Kohei ; Okada, Yoshiyuki

Author_Institution

Fujitsu Labs. Ltd., Kanagawa, Japan

fYear

2004

fDate

23-25 March 2004

Firstpage

570

Abstract

In this paper, a new program-updating method for embedded systems adopting the RISC architecture is presented. Previously "a delta compression algorithm" is used but when the algorithm is actually implemented with devices, the transmission time is longer than the assumed time. To overcome this problem "extended delta compression algorithm" is proposed. The target of this algorithm is to create a delta file that is 10% smaller than those currently available. A new restoring method is also proposed here to overcome the problem of data overwritten of flash memory in the restoring process. A characteristic of this system is that the expanded data are stored in "nonvolatile" memory before being written into the flash memory, and the flash memory is not restored until the data for the next block has been expanded.

Keywords

data compression; embedded systems; flash memories; random-access storage; reduced instruction set computing; RISC architecture; delta file; embedded systems; extended delta compression algorithm; failed updating recovery; flash memory; nonvolatile memory; program-updating method; restoring method; Cellular phones; Compression algorithms; Embedded system; Error correction; Flash memory; Laboratories; Nonvolatile memory; Power supplies; Protection; Reduced instruction set computing;

fLanguage

English

Publisher

ieee

Conference_Titel

Data Compression Conference, 2004. Proceedings. DCC 2004

ISSN

1068-0314

Print_ISBN

0-7695-2082-0

Type

conf

DOI

10.1109/DCC.2004.1281546

Filename

1281546