Finite element analysis application to semiconductor devices

Author

Schroen, Walter H. ; Blanton, Paul S. ; Edwards, Darvin R.

Author_Institution

Texas Instrum. Inc., Dallas, TX, USA

fYear

1988

fDate

32477

Firstpage

35

Lastpage

46

Abstract

The application of finite-element analysis (FEA) to the package design of the integrated circuit is addressed. An overview is given of structured design and stress issues for packages, and fundamental FEA concepts are reviewed. Stress-sensitive test structures used by industry are described. Aspects of package design, namely surface shear stresses, die attach stresses, stresses within the plastic, and metal notching, are considered

Keywords

finite element analysis; integrated circuit technology; packaging; reliability; semiconductor technology; stress effects; stress measurement; FEA; VLSI devices; die attach stresses; finite-element analysis; industry; integrated circuit; metal notching; package design; plastic; semiconductor devices; structured design; surface shear stresses; test structures; Application specific integrated circuits; Circuit testing; Finite element methods; Integrated circuit packaging; Microassembly; Plastic integrated circuit packaging; Plastic packaging; Semiconductor device packaging; Semiconductor devices; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Dayton Chapter Symposium, 1988. Avionics Integrity Program., Ninth Annual IEEE/AESS

Conference_Location

Dayton, OH

Type

conf

DOI

10.1109/DAYTON.1988.76015

Filename

76015