Title :
Next generation PowerPCTM microprocessor test strategy improvements
Author :
Pyron, Carol ; Prado, Javier ; Golab, James
Author_Institution :
Somerset Design Center, Motorola Inc., Austin, TX, USA
Abstract :
The first PowerPC microprocessor in the new G3 generation of designs, the MPC750, incorporates new test strategy approaches to improve the product test quality, reliability, and debug, and to reduce the total time to market
Keywords :
built-in self test; computer testing; design for testability; elemental semiconductors; integrated circuit testing; integrated circuit yield; logic testing; microprocessor chips; production testing; reliability; silicon; BIST; DFT; G3 generation; IEEE test; MPC750; PowerPCTM microprocessor; Si; Si debugging; debugging; microprocessor testing; product test quality; redundancy; reliability; scan testing; time to market; Automatic testing; Benchmark testing; Circuit faults; Circuit testing; Manufacturing; Microprocessors; Silicon; System buses; System testing; Time to market;
Conference_Titel :
Test Conference, 1997. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-4209-7
DOI :
10.1109/TEST.1997.639644
