DocumentCode
2744631
Title
Systolic implementation of polyphase decimators and interpolators
Author
Abdel-Raheem, E. ; El-Guibaly, F. ; Antoniou, Andreas
Author_Institution
Dept. of Electr. & Comput. Eng., Victoria Univ., BC, Canada
Volume
2
fYear
1994
fDate
3-5 Aug 1994
Firstpage
749
Abstract
New systolic and semi-systolic implementations of polyphase FIR and IIR decimators and interpolators with integer/fractional compression/expansion factors are derived using an algebraic mapping technique. The control signals necessary to implement the polyphase structures are explicitly identified. The new structures have the advantages of being modular, regular, hierarchical, and pipelined
Keywords
FIR filters; IIR filters; digital filters; interpolation; pipeline processing; systolic arrays; transmultiplexing; FIR; IIR; algebraic mapping technique; compression factors; control signals; expansion factors; hierarchical structures; modular structures; pipelined structures; polyphase decimators; polyphase interpolators; regular structures; semi-systolic implementations; systolic implementations; Convolution; Finite impulse response filter; IIR filters; Polynomials; Prototypes; Sampling methods; Signal processing; Signal sampling; Switches; Transfer functions;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1994., Proceedings of the 37th Midwest Symposium on
Conference_Location
Lafayette, LA
Print_ISBN
0-7803-2428-5
Type
conf
DOI
10.1109/MWSCAS.1994.518924
Filename
518924
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