Analog current-mode design for soft-max computation

A modular design methodology supports CMOS circuits for the analog implementation of the soft-max function. An optimization-based strategy allows the designer to fit VLSI-technology requirements to soft max mapping accuracy. Specific circuit solutions to both the approximation of the exp() function and the normalizing ratio enhance overall effectiveness by: 1) reducing VLSI complexity, 2) exploiting inherent parallelism, and 3) limiting power consumption. Simulation results confirm the consistency of the hardware realization with theoretical predictions.