A Straight-Line-Trench Isolation And Trench-Gate Transistor (SLIT) Cell For Giga-bit DRAMs

An advanced giga-bit DRAM cell with a Straight-Line- trench Isolation and Trench-gate transistor(SLIT) is developed. This memory cell structure has advantages for precise fine pattern defi-ieation. The straight-line-trench enables delineation of the designed cell active area. In addition, a simple pattern shrinking technique called Side-wall Aided Fine pattern Etching(SAFE) can provide manufacturable alignment margins by reducing the trench width to less than design rule. The characterisfics of the SLIT transistor with gate length of sub- 0.1p,m for giga-bit DRAM is demonstrated.