Title :
An on-line self-testing switched-current integrator
Author :
Abu-Shahla, Osama K. ; Bell, Ian M.
Author_Institution :
Dept. of Electron. Eng., Hull Univ., UK
Abstract :
We describe a CMOS on-line-self-testing, double-sampled, fully-balanced, switched-current bilinear integrator. High spot-defect fault coverage of the integrator, clock generator and checking circuit is achieved under normal process variations
Keywords :
CMOS logic circuits; built-in self test; integrated memory circuits; integrating circuits; switched current circuits; BIST; CMOS; VLSI; checking circuit; clock generator; double-sampled bilinear integrator; memory cell; online self-testing; spot-defect fault coverage; switched-current integrator; Automatic testing; Built-in self-test; Circuit faults; Circuit synthesis; Circuit testing; Clocks; Filters; Operational amplifiers; Switching circuits; Voltage;
Conference_Titel :
Test Conference, 1997. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-4209-7
DOI :
10.1109/TEST.1997.639652
