Title :
A Novel Technology For Megabit Density, Low Power, High Speed, NVRAMs
Author :
Sharma, U. ; Woo, M. ; Kirsch, H. ; Hayden, J. ; Yeargain, J.R.
Author_Institution :
Motorola Inc.
Abstract :
A novel technology for realizing high density, high performance NVRAMs has been developed. The heart of the technology is a scalable non-volatile memory element which requires low programming voltages. Coupled with a versatile, 0.4/spl mu/m feature size, high speed, BiCMOS SRAM latch a true high performance NVRAM bit cell has been designed.
Keywords :
EPROM; Latches; Logic gates; Nonvolatile memory; Performance evaluation; Random access memory; Thin film transistors;
Conference_Titel :
VLSI Technology, 1993. Digest of Technical Papers. 1993 Symposium on
Conference_Location :
Kyoto, Japan
DOI :
10.1109/VLSIT.1993.760241
