DocumentCode :
2745730
Title :
A SiGe-base PNP ECL circuit technology
Author :
Harame, D.L. ; Comfort, J.H. ; Crabbe, E.F. ; Cressler, J.D. ; Warnock, J.D. ; Meyerson, B.S. ; Hsu, K.Y.J. ; Cotte, J. ; Stanis, C.L. ; Stork, J.M.C. ; Sun, J.Y.-C. ; Danner, D.A. ; Aanello
Author_Institution :
IBM T.J. Watson Research Center
fYear :
1993
fDate :
17-19 May 1993
Firstpage :
61
Lastpage :
62
Abstract :
In this work we present the first SiGe-base PNP ECL circuit results. The SiGe-base PNP circuit technology includes extended Ge-profile designs for low collector doping levels, a self-aligned transistor structure on deep and shallow trench isolation, and in situ doped polysilicon emitter contacts. Circuit transistors are ob tained wilh oood Gummel characteristics, a current gain of 40, a low emitter resistance of 9 /spl Omega/, a pinched base sheet resistance of 9.5 k/spl Omega///spl square/, and a peak fT of 3 1 GHz at a VRC of 3 volts. The circuit transistors have low parasitics resulting in a peak fmax of 38 GHz at a VBC of 3 volts. An ECL ring oscillator delay of 44 ps was measured at 2.7 mW.
Keywords :
Delays; Doping; Films; Resistance; Silicon; Silicon germanium; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 1993. Digest of Technical Papers. 1993 Symposium on
Conference_Location :
Kyoto, Japan
Type :
conf
DOI :
10.1109/VLSIT.1993.760245
Filename :
760245
Link To Document :
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