• DocumentCode
    2746059
  • Title

    Sub-1/4 /spl mu/m Dual Gate CMOS Technology using In Situ Doped Polysilicons for N and PMPS Gates

  • Author

    Okazaki, Y. ; Inokawa, H. ; Kobayashi, T. ; Miyake, M. ; Morimoto, T. ; Matsuda, T.

  • Author_Institution
    NTT LSI Laboratories
  • fYear
    1993
  • fDate
    17-19 May 1993
  • Firstpage
    95
  • Lastpage
    96
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 1993. Digest of Technical Papers. 1993 Symposium on
  • Conference_Location
    Kyoto, Japan
  • Type

    conf

  • DOI
    10.1109/VLSIT.1993.760262
  • Filename
    760262
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2746059