Title :
On modeling and simulating chip design processes: The RS model
Author :
Hassine, Amir ; Barke, Erich
Author_Institution :
EDA Group, Leibniz Univ. of Hannover, Hannover
Abstract :
The International Technology Roadmap for Semiconductors (ITRS) reports about the increasing divergence between what technological advances afford (in terms of the number of transistors on a single chip) and the capability to design these complex chips: the ldquoDesign Gaprdquo. The chip design industry evolved into very sophisticated and complex processes needing managerial approaches to master them. Missing possibilities to evaluate course and outcome of projects in a simulative way entail soaring losses. In this paper, we present a pioneer approach that allows for modeling design processes in a formal manner. A prototype implementation of a simulator based on our model attests the appropriateness of the model.
Keywords :
integrated circuit design; integrated circuit manufacture; integrated circuit modelling; semiconductor process modelling; ITRS; International Technology Roadmap for Semiconductors; RS model; chip design industry; chip design process modeling; design gap; Analytical models; Chip scale packaging; Computational modeling; Computer simulation; Costs; Home computing; Microelectronics; Process design; Transistors; Virtual prototyping; Chip Design Process; Modeling; RS Model; Simulation;
Conference_Titel :
Engineering Management Conference, 2008. IEMC Europe 2008. IEEE International
Conference_Location :
Estoril
Print_ISBN :
978-1-4244-2288-3
Electronic_ISBN :
978-1-4244-2289-0
DOI :
10.1109/IEMCE.2008.4617958
