DocumentCode :
2746876
Title :
Prefix computations on symmetric multiprocessors
Author :
Helman, David R. ; JáJá, Joseph
Author_Institution :
Inst. for Adv. Comput. Studies, Maryland Univ., College Park, MD, USA
fYear :
1999
fDate :
12-16 Apr 1999
Firstpage :
7
Lastpage :
13
Abstract :
We introduce a new optimal prefix computation algorithm on linked lists which builds upon the sparse ruling set approach of Reid-Miller and Blelloch. Besides being somewhat simpler and requiring nearly half the number of memory accesses, we can bound our complexity with high probability instead of merely on average. Moreover, whereas Reid-Miller and Blelloch (1996) targeted their algorithm for implementation on a vector multiprocessor architecture, we develop our algorithm for implementation on the symmetric multiprocessor architecture (SMP). These symmetric multiprocessors dominate the high-end server market and are currently the primary candidate for constructing large scale multiprocessor systems. Our prefix computation algorithm was implemented in C using POSIX threads and run on four symmetric multiprocessors-the IBM SP-2 (High Node), the HP-Convex Exemplar (S-Class), the DEC AlphaServer; and the Silicon Graphics Power Challenge. We ran our code using a variety of benchmarks which we identified to examine the dependence of our algorithm on memory access patterns. For some problems, our algorithm actually matched or exceeded the performance of the standard sequential solution using only a single thread. Moreover, in spite of the fact that the processors must compete for access to main memory, our algorithm still achieved scalable performance with up to 16 processors, which was the largest platform available to us
Keywords :
Unix; distributed algorithms; DEC AlphaServer; HP-Convex Exemplar; IBM SP-2; POSIX threads; Silicon Graphics Power Challenge; high-end server market; large scale multiprocessor systems; memory access patterns; prefix computations; scalable performance; sparse ruling set approach; symmetric multiprocessor architecture; symmetric multiprocessors; Computer architecture; Concurrent computing; Costs; Educational institutions; Graphics; Radio access networks; Silicon; Tree data structures; Tree graphs; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Processing, 1999. 13th International and 10th Symposium on Parallel and Distributed Processing, 1999. 1999 IPPS/SPDP. Proceedings
Conference_Location :
San Juan
Print_ISBN :
0-7695-0143-5
Type :
conf
DOI :
10.1109/IPPS.1999.760427
Filename :
760427
Link To Document :
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