DocumentCode :
2747610
Title :
Opportunities for parallelism when implementing algorithms in VHDL — a case study — Shift-Or
Author :
Schulz, Barry ; Parikh, Chirag ; Trefftz, Christian
Author_Institution :
Sch. of Eng., Grand Valley State Univ., Grand Rapids, MI, USA
fYear :
2009
fDate :
7-9 June 2009
Firstpage :
235
Lastpage :
238
Abstract :
Field Programmable Gate Arrays (FPGAs) are becoming pervasive in High Performance Computing systems, making it possible for developers to implement algorithms (or at least portions of algorithms) directly in hardware using Hardware Description Languages. The Shift-Or algorithm for exact string matching was implemented using VHDL on a XILINX FPGA. This paper discusses some of the opportunities for performance improvement offered by VHDL that were used when implementing the Shift-Or algorithm.
Keywords :
field programmable gate arrays; hardware description languages; parallel processing; Shift-Or algorithm; exact string matching; field programmable gate arrays; hardware description languages; Application software; Concurrent computing; Energy consumption; Field programmable gate arrays; Guidelines; Hardware design languages; High performance computing; Parallel processing; Performance gain; Pervasive computing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electro/Information Technology, 2009. eit '09. IEEE International Conference on
Conference_Location :
Windsor, ON
Print_ISBN :
978-1-4244-3354-4
Electronic_ISBN :
978-1-4244-3355-1
Type :
conf
DOI :
10.1109/EIT.2009.5189618
Filename :
5189618
Link To Document :
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