A novel digital control for DC/DC converters to improve steady-state performances

Author

Boscaino, V. ; Di Blasi, G.M. ; Livreri, P. ; Marino, F. ; Minieri, M.

Author_Institution

Dipt. Ing. Elettrica Elettronica e TLC, Univ. degli Studi di Palermo

fYear

2006

fDate

10-14 Sept. 2006

Firstpage

1

Lastpage

4

Abstract

This paper describes an innovative digital PWM control implementation for low voltage, high current DC-DC converters. The proposed technique, based on the use of a low resolution DAC, improves steady-state performances, minimizing limit cycle effects. The novel technique is tested on a FPGA-based single phase buck converter operating at 250 kHz. A detailed description of the proposed architecture is given and test results, simulation and experimental ones, are shown

Keywords

DC-DC power convertors; PWM power convertors; digital control; digital-analogue conversion; field programmable gate arrays; 250 kHz; DC-DC converters; FPGA; digital PWM control; low resolution DAC; single phase buck converter; steady-state performance; Buck converters; DC-DC power converters; Digital control; Limit-cycles; Low voltage; Pulse width modulation; Pulse width modulation converters; Steady-state; Testing; Voltage control; DC/DC converters; FPGA; digital control; limit cycle;

fLanguage

English

Publisher

ieee

Conference_Titel

Telecommunications Energy Conference, 2006. INTELEC '06. 28th Annual International

Conference_Location

Providence, RI

Print_ISBN

1-4244-0430-4

Electronic_ISBN

1-4244-0431-2

Type

conf

DOI

10.1109/INTLEC.2006.251653

Filename

4018155