Reconfigurable multi-functioning logic structures: a case study of MMX/floating-point unit design

This paper presents a design study that fuses functionally similar logic components using reconfigurable structures to reduce the overall size and complexity. The objective is to obtain smaller total area and lower power consumption while minimizing the performance loss. A double precision floating-point unit design and an MMX (Microprocessor Media eXtension) unit design are subjected to this design study. Similar sub-logic-structures are identified in both functional units and used as basic cells in coarse grain reconfigurable design. The result is a fast, compact, and low-power circuit. The performance overhead is mostly attributed to the reconfiguration logic. Complementing this overhead however is a more compact overall design resulting in a better routing and placement solutions. Better compaction is achieved through reduction of redundant logic structures