• DocumentCode
    2747863
  • Title

    A design methodology for the implementation of embedded vehicle navigation systems

  • Author

    Islam, Azizul ; Langlois, J. M Pierre ; Noureldin, Aboelmagd

  • Author_Institution
    Dept. de genie Inf. et genie logiciel, Ecole Polytech. de Montreal, Montreal, QC, Canada
  • fYear
    2009
  • fDate
    7-9 June 2009
  • Firstpage
    297
  • Lastpage
    300
  • Abstract
    This paper presents a design methodology for the implementation of GPS/INS navigation system on Field Programmable Gate Arrays (FPGA). The method proposed in this research is examined using data from three-axis accelerometers and gyroscopes integrated with GPS for a road test experiment in a land vehicle. The designs are described in software which is executed on an embedded microprocessor. Results show that the decentralized closed loop Kalman filter algorithm running on a single precision floating point embedded processor can produce acceptable results relative to those obtained from a desktop PC platform. A first version of the Kalman filter code (used for the optimal integration of INS and GPS) is executed from a 1 MB external SRAM supported by 8 KB of data cache and 4 KB of instruction cache. A second version is run from high speed 64 KB on-chip Block RAM. In the two memory configurations, the maximum sampling frequencies at which the code can be executed are 80 Hz and 119 Hz, respectively, while accelerometer and gyroscope sensors provide data at 75 Hz. Additionally, from the post synthesis timing analyses, the critical frequencies for the two hardware configurations were 63.3 MHz and 83.2 MHz, an enhancement of 26% and 66% respectively over the reference clock of 50 MHz.
  • Keywords
    Global Positioning System; Kalman filters; SRAM chips; accelerometers; embedded systems; field programmable gate arrays; gyroscopes; road vehicles; GPS/INS navigation system; SRAM; closed loop Kalman filter algorithm; data cache; desktop PC platform; embedded microprocessor; embedded vehicle navigation systems; field programmable gate arrays; frequency 119 Hz; frequency 50 MHz; frequency 63.3 MHz; frequency 75 Hz; frequency 80 Hz; frequency 83.2 MHz; gyroscopes; instruction cache; land vehicle; on-chip block RAM; road test experiment; three-axis accelerometers; Accelerometers; Design methodology; Field programmable gate arrays; Frequency synthesizers; Global Positioning System; Gyroscopes; Navigation; Random access memory; Roads; Vehicles;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electro/Information Technology, 2009. eit '09. IEEE International Conference on
  • Conference_Location
    Windsor, ON
  • Print_ISBN
    978-1-4244-3354-4
  • Electronic_ISBN
    978-1-4244-3355-1
  • Type

    conf

  • DOI
    10.1109/EIT.2009.5189630
  • Filename
    5189630